Priority sequence control



June 27, 1967 G. A. BLAAUW ETAL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 30, 1964 155 Sheets-Sheet l 4 PRIORITY SEQUENCING CONTROL Joe RRDRITY A 1-14 v N45 C0NFL|cT\4 27 4 1 DcID 1 EARLY B R O/L DECODER ENCODER *'LTCH LTCH 4-15/ d 4-22/ 1-25 "2 "8 f- \H7 cHEcKPomT DcrD `4-12 LATE 4-25 446 DECDDE e R EARLY k LTCVLTCH I DECODER i 4-24 l 4-44/ UX 4-9 cHfcnPomr 1', e 26/ d@ 4 4 i r i W RD BOUNDARY 1L iNSTRUCTtON LOAD E INSTRUCTION EXECUTION o OPERAND u ATTORNEY DATA PATHS l il, l

June 27, 1967 G. A. BLAAuw ETAL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 50. 1964 155 Sheets-Sheet 5 l' MDR' June 27, 1967 G. A. BLAAUW ET AL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 30, 1964 155 Sheets-Sheet 4 June 27, 1967 G. A. BLAAUw ETAI- PHIORITY SEQUENCE CONTROL 155 Sheets-Sheet 5 Filed June 30, 1964 June 27, 1967 s. A. BLAAuw ET AL 3.328,771

PRIORITY SEQUENCE CONTROL Filed June 30, 1964 5o REQUEST RING 155 Sheets-Sheet 6 B R I TcH I TcH I oGIc IIIoIcIIToIIs l IIIsTIIucTIoII \55 INDIRECT DIRECT, III/ICTIIIE CA REQUEST @l RING FIELD June 27, 1967 s. A. BLAAuw ET AL 3,323,771

PRIORITY SEQUENCE coN'rnoL Filed June 30, 1964 15:5 Sheets-Sheet 7 C B REQUEST RING REFILL FIG. 5d

INDIRECT cc REQUEST RING FA/c

FE Z/c 8|sw PAR FETCH RESTART CHG 2 June 27, 1967 Filed June 50, 1964 FIG.6

-CATE INCR TO XO G. A. BLAAUW PRIORITY SEQUENCE ETTAL CONTROL X BUS BYTE 0 5 Sheets-Sheet 8 -I'IDBO SER F -CATE IIIDBD TO XO NOT CROSS CATE NOBO TO XO CROSS *GATE MDBO SER TO XD INCR O-D -IIDBD SER O -MDBO 4-0 +SCAN INTO `IIIIDBO 0-0 CA-BRR-IS --MDBD SER 7 -INCR 0-T FIG.7

-ADR BIT 5 IMEMDRY DI SELECTED MEMORY II SELECTED +SCAN INTO CB-BRR-B ADDRESS INVALID I-MEMORY I0 SELECTED +CATE SELECT +CLR U -CLRU +SCAN IN MEM ADDRESS INVALID +CLR R SCAN IN WORD 24 -GATE SELECT l P HIEMORY ADDR INVALID June 27, 1967 G. A. BLAAuw ETAI- 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 30, 1964 155 Sheets-Sheet 9 -cATEmcRTo MAR MAR BITS P O HNCR o-o FIG. 80

HNCR 0-1 -INCR D-P +C ADR BIT P GATE W0 TD MAR -GAT 0 T MAR -FIXED ADDR P -GATE INCR TOMAR A -GATE W4 TO MAR -GATE Z4 T0 MAR -CATE SW TD MAR -INCR I-P -WLP -Z-P A +C ADR BITD June 27, 1967 G. A. aLAAuw ET AL 3,328,771

PR IOR ITY SEQUENCE CONTROL Filed June 30, 1964 155 Sheets-Sheet lO FIG.8b

-STORE BYTE MAR 1, 3, A, B, C AND D STORE ENCODER +C ADR BIT 4 DL +GW P TO MAR ENCODER -STORE BYTE PER READ MODE -STORE BYTE PER TO BTT 4 -S -SW P TO MAR ENCODER -STORE PER SWITCH -MEM RI BITi -MEM RI BIT? -MEM RI BH4 +C ADR BITS -SCAN WORD RING 4 -SW R 1&NDT2

*BiT

+RIT2 -SW R 2 & NOT4 -SW R NOTT NOT? +C STORE C +C STORE D +C STORE A +C STORE B June 27, 1967 Filed June 30, 1964 155 Sheets-Sheet l1 F|G 9 MEMORY SELECT -CATE CDMSDLE Sw TD MAR -CATE zD TD MAR DT L? -a -MEMDRT SELECT Le y -CATE wo TD MAR -CATE LMC To MAR E -ZD-D A *L L -0 a a a DE +01 -wD-D D 1 S-C -TMCR D-D '/98 E -a -MEMDRT SELECT 5E -zD-TA -WO B L -o -TNCR 0-4 -BT -ST --& DE +01 S-A -C -C SELECT DD ATE SELECT B -OI DL :T- -C SELECT DT -a -or DT.

+MEMDRT DL SELECTED -C SELECT TD -a -ox DL +MEMDRY To SELECTED -C SELECT M -SELECT TTMTMC PULSE -a -ox DL +MEMDRT u 9-5 9-2 9-4/ SELECTED June 27, 1967 s. A. BLA/auw ETAL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 50. 1964 153 Sheets-Sheet l2 FIG. IO

CA REGISTER BYTE O me a om xo m cAo ma mi o 2 +xo-P h f I/ +cLR a om xo 1o cAo +8|| +8 +0I IP P Io-a -cAo-P +xo-o H T -cAo-o 1 ....I +X0-Y T +8 +a +01 IP L -cAo-r FIG H D REGISTER BYTE 0 -CLR asus xo To oo +xo-P +cLR a om xo To oo *SHI +B +0! IP -no-P +xo-o H-IY H-3 ,4I-I 4H `I -no-o I L'. +xo-v T E June 27, 1967 G. A. BLAAUW mL 3,328,771

PRIORITY SEQUENCE CONTRGL Filed June 30, 1964 155 Sheets-Sheet 15 FIGZ A REG|STER BYTE o +YO-F +ADDER 2 PARITY CLR & GATE ADDER 2 T0 AU +CLR A GATE YO TO A0 -CLR GATE Y0 T0 A0 -CLR GATE ADER 2 T0 Y0 -CLR & GATE X0 T0 A0 ADDER 2 BIT 0 June 27, 1967 s. A. BLAAuw ETAI- 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 30, 1964 155 Sheets-Sheet 15 WP FIG.44b E REGISTER BYTE 4 +CG2-P +ADDE 4 PA Y +CLR GATE ADDER 4 T0 E4 A +CLR 4| GATE CCE T0 E4 CROSS +CLR GATE Y4 T0 E4 -CLR ACATE 40R 0 TO E4 +GATE ZEROS T0 E4 +CLR & GATE 40H0 T0 E4 -CLR A GATE Y4 TO E4 'CLR AGATE CO2 TU E4 C 'GLR GATE ADDER4 TOE4 +Y4-7 +ADDE 44 +BINARY +CLR & GATE 40440 T0 E4 +GATE 4 T0 E4 +ADUER 2 snr June 27, 1967 G. A. BLAAuw ETAL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June 50, 1964 155 Sheets-Sheet 16 -CLR a GATE M090 SER To E2 +A0DER 2 PARHY 4,29

ma a GATE zinns To E2 +81 fa I +5 +cLR a GATE ,1002221022 MMO -cLR 2cm 100222 m52 -cLR a GATE v2 To 22 CLR 2 cm 021022 CLR a om 12H05 To E2 H4080 SER 0 1 '/44-25 L /|4-24 -P IP +52 M "mi +8. l E" a IP +MDBO SER 7 June 27, 1967 G. A. BLAAUw ETAL 3,328,771

PRIORITY SEQUENCE CONTROL Filed June C50, 1964 153 Sheets-Sheet l? FIG.14d E REGISTER BYTE 3 +GLR G GATE 0 0R15 T0 E5 +GLR GATE MDBO SER T0 E3 ADDER 2 PARITY +CLR & GATE ADDER 2 TO E5 +MDBO SER P -CLR A GATE YE T0 E3 -GLR E GATE Z0 T0 E5 HER & GATE ZO T0 E3 +GLR GATE 0 045 T0 E5 -GLR 8l GATE ADDER 2 TG E3 -CLR GATE MDBO SER T0 +ADDER 2 BIT 0 MDB() SER O +ADDER 2 BTT? +METB0 SER 7 +GATE 15 T0 E5 June 27, 1967 Filed June 30, 1964 FIGA 5 GATE X0 T0 CAO G. A. BLAAUW ETAL 155 Sheets-Sheet 18 CA REGISTER SET AND RESET CLR AND GATE X0 T0 CAO +8. 1P GEA A GATE x1 To GAT GLA ANG GATE xT To GA T GATE x2 To GA2 +8 -GLR ANG GATE x2 To GA2 GATE GAG To GA 2 Jra GLR AAG GATE GAT To GA2 GATE GG TG GA2-o GATE GG To GA 2-T +8 Jra GLA ANG GATE BG To GA 2-0 1P IP -GA AA A +GATEBCTOCA2 2 L GGTEGGToGAzT GAT GG To GA E 2 a +8 +8' GLA ANG GATE GG TG GA 2 2 IP 1P GLR ANG GATE GG To GA 2-5 GATE GG To GA2 P GGTR GAANo GATE +8 o G 2 G-T TP TP GLR AAG GATE L BG To GA 2*P RESET GA 2-4-T +8 m GLR ANG GATE xs To GA3 GLA G TP l TP GATE x3 To 6^ 3 GLA AAG RESET GA 2-4-T GA GYTE To AEsTAAT m GLA ANG GATE BG To GA G-o-s June 27, 1967 G. A. BLAAUW ETAL PR IORITY SEQUENCE CONTROL Filed June 30, 1964 l 153 Sheets-Sheet 19 H645 ce REGTSTER SET AND RESET GATE xo To cao +8 -GLR AND GATE xo To GGG GLR E 1P @ATE X1 T0 CB1 CLR AND GATE XT T0 GBT GATE x2 TG ce2 +8 -GLR Ano GATE x2 To G52 GATE GGG-o4 To ce2-o3 GLR AAD GATE GGG To GGz +B IP GATE GG To cs2-o -GLR AND GATE GGTG GGz-o GATE Bc To Gaz 1 +8 Lm 1P 1P -GLRAA GAT B T s- +GATEGGTGGB2-2 D [C0621 GATE BG To Gaz-5 GLR AND GATE Gc To GGz-2 +S I+a 1P 1P GLR ANG GATE Gc TG cs2-5 GLA AAD GATE GATE Gc To cs2-P +8 E0 Eccl) mzcm TP P L EG To GGz-P GATE Bc To GG2-4-T GLA ANG GATE Bc To GG2-4-T +8. IP L CL" C IP GLR ANG GATE GG To GB2-4-T GATE X3 TD CD3 -i- GB BYTE TO RESTART CLR AND GATE EG T0 CB 5-0-3 CLR AND GATE BG T0 CD5 CLR AND GATE T0 C85 -CLR AND GATE T0 CD5 June 27, 1967 G. A. BLAAUW ETAL 3,328,771

PR IORITY SEQUENCE CONTROL Filed June 30. 1964 155 Sheets-Sheet 2O F|G 47 CC REGISTER SET AND RESET GATE XO T0 CGU +8 GLR AND GATE X0 T0 GG 0 IP GLR G GATE X1 T0 CGT +G CLR AND GATE Xl T0 GCT GATE X2 T0 GGZ ha GLR AND GATE X2 T0 GC 2 GATE GG 3-0-3 T0 +8 CLR AND GATE G65 T0 GG 2G31 CC 2-0-5 1p GATE BG T0 CG 2-0 AT 0 -1 L CLR AND GATE BC T0 CC -0 G E BCT GC 2 2 A A GG GATE BC T0 CG 2-2 CLR NDC TE Bc To 2 am Bc ro cc 2-5 L cLn Ann GATE ac To ccz-z +a +a 1P 1P cLR Arm GATE Bc m cc 2-5 cLn AND GATE GATE Bc ro cc z-P ,fa o Bc rocc z-o-a 1P IP cLn Ann GATE ac To cca-P RESET GG 2-4-7 CLR AND GATE X3 T0 CG 5 +8| f -l'eu CLR C IP I IP GATE x5 TU OC3 GLR AND RESET GG 2-4-7 GLR AND GATE BC T0 GC 5-0-5 +B GC BYTE TU RESTART IP 

1. PRIORITY SEQUENCING CONTROL FOR A DATA PROCESSING SYSTEM HAVING MEMORY MEANS, LOGICAL MEANS AND BUS MEANS INTERCONNECTING SAID MEMORY MEANS AND SAID LOGICAL MEANS, CHARACTERIZED BY: (A) A PLURALITY OF REQUEST RINGS, EACH BEING ARRANGED TO PROVIDE A SEQUENCE OF OPERATION REQUESTS, EACH REQUEST BEING ARRANGED, UPON GRANT, TO CONTROL A SHORT SEQUENCE OF DATA MANIPULATIONS INVOLVING AT LEAST ONE OF SAID MEMORY MEANS AND LOGICAL MEANS AND SAID BUS MEANS, SAID REQUEST RINGS BEING ASSIGNED RANK FOR PRIORITY PURPOSES; AND (B) MEANS TO PROVIDE SELECTIVE REQUEST GRANT SIGNALS TO THE HIGHEST RANK REQUESTING RING CURRENTLY REQUESTING.
 19. PRIORITY SEQUENCING CONTROL MEANS FOR A DATA PROCESSING SYSTEM IN WHICH INDIVIDUAL CONTROL SIGNALS CONTROL A PLURALITY OF JOBS OVER A SHORT PLURALITY OF TIME PERIODS, CHARACTERIZED BY: (A) MEMORY WORD AND BYTE ADDRESSING MEANS; (B) MEANS TO CONTROL WORD ADDRESSING ON THE FIRST OF SAID PLURALITY OF TIME PERIODS, ACCORDING TO CODE VALUES IN SAID MEMORY ADDRESSING MEANS, WHEREUPON THE CODE VALUES IN SAID MEMORY ADDRESSING MEANS MAY BE CHANGED FOR ADDRESSING A SECOND WORD DURING A SUBSEQUENT TIME PERIOD; AND (C) MEANS CONNECTED TO SAID MEMORY WORD AND BYTE ADDRESSING MEANS TO RECEIVE THE BYTE ADDRESS AND RETAIN IT DURING A FIXED NUMBER OF TIME PERIODS SO THAT THE WORD ADDRESSED DURING THE TIME PERIOD BECOMES AVAILABLE FOR BYTE ADDRESSING AT THE SAME TIME THAT THE DELAYED BYTE ADDRESS BECOMES AVAILABLE. 